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Please use this identifier to cite or link to this item: http://hdl.handle.net/1920/4587

Title: Tiny True Random Number Generator
Author(s): Karanam, Shashi Prashanth
Keywords: True Random Number Generator
Ring Oscillator
Jitter
Diehard
NIST
Issue Date: 25-Jul-2009
Abstract: Random Number Generators (RNGs) play a crucial role in the security of modern-day cryptographic modules. In cryptography they are used to generate initialization vectors for cryptographic primitives and protocols, keys for secret and public-key algorithms, seeds for pseudo-random number generators, challenges, nonces, padding bits, and system parameters in security protocols. A True Random Number Generator (TRNG) is a physical device that generates statistically independent and unbiased bits. A TRNG harvests randomness present in the underlying physical source and the generator will have no internal state kept. Increased research interest in the field of reconfigurable computing is making Field Programmable Gate Arrays (FPGAs) a preferred platform for cryptographic implementations. Hence, a pure digital implementation of a TRNG is highly demanded by modern-day applications. This thesis describes a simple TRNG design based on a single ring oscillator implemented using pure logic gates focusing on low power, and low area cryptographic applications. The randomization technique is based on sampling phase jitter contained in the oscillator ring. The TRNG has a very low area consumption, high throughput/area ratio and generates output bits at an acceptable bit rate. The security of the cryptographic primitives relies on the quality of the generated random bits, hence a TRNG for cryptographic applications must meet stringent requirements and should generate bits that can not be reproduced and are unpredictable in nature. The generator can be tested for its good statistical properties using a statistical test suite, ideally adjusted to a perfect RNG. Our TRNG design have been verified against statistical test suites from Diehard, NIST and BSI.
Degree: Master of Science in Computer Engineering
Type: Thesis
URI: http://hdl.handle.net/1920/4587
Appears in Collections:The Volgenau School of Engineering

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